Honeywell International Inc.
MULTI-ACCESS MEMORY CELL

Abstract:

An example device includes a memory element configured to store a state for a bit in response to a write operation and to output an indication of the state for the bit in response to a read operation. The device includes first access circuitry coupled to the memory element. The first access circuitry is configured to allow a first current to flow through the first access circuitry in response to being driven in the read operation or the write operation. The device includes second access circuitry coupled to the memory element. The second access circuitry is configured to allow a second current to flow through the second access circuitry in response to being driven in the write operation. A transconductance of the first access device is different than a transconductance of the second access device.