Analog Devices, Inc.
Current mirror arrangements with reduced sensitivity to buffer offsets

Last updated:

Abstract:

An example current mirror arrangement includes a first portion and a second portion, each of which includes a current mirror having transistors Q1 and Q2, a buffer amplifier that has an input coupled to a base/gate terminal of Q1 and an output coupled to a base/gate terminal of Q2, a master resistor coupled to an emitter/source terminal of Q1, and a slave resistor coupled to an emitter/source terminal of Q2. Furthermore, the slave resistor of the first portion is coupled to the slave resistor of the second portion. Providing additional resistors on master and slave sides of a current mirror arrangement may advantageously allow benefiting from the use of buffers outside of a feedback loop of a current mirror while reducing the sensitivity of the current mirror arrangement to buffer offsets.

Status:
Grant
Type:

Utility

Filling date:

21 Dec 2019

Issue date:

19 Jan 2021