Microchip Technology Incorporated
BACKSIDE INTERCONNECT FOR INTEGRATED CIRCUIT PACKAGE INTERPOSER

Abstract:

Methods are provided for forming an integrated circuit (IC) package interposer configured for back-side attachment. A porous silicon double layer is formed on a bulk silicon wafer, e.g., using a controlled anodization, the porous silicon double layer including two porous silicon layers having different porosities. An interposer is formed over the porous silicon double layer, the interposer including back-side contacts, front-side contacts, and conductive structures (e.g., vias and metal interconnect) extending through the interposer to connect selected back-side contacts with selected front-side contacts. The structure is then split at the interface between the first and second porous silicon layers of the silicon double layer, and the interposer including the second porous silicon layers is inverted and etched to remove the second silicon layer and expose the back-side contacts, such that the exposed back-side contacts can be used for back-side attachment of the interposer to a package substrate or other structure.