Microchip Technology Incorporated
Central processing unit with enhanced instruction set

Last updated:

Abstract:

An integrated circuit has a master processing core with a central processing unit coupled with a non-volatile memory and a slave processing core operating independently from the master processing core and having a central processing unit coupled with volatile program memory, wherein the master central processing unit is configured to transfer program instructions into the non-volatile memory of the slave processing core and wherein a transfer of the program instructions is performed by executing a dedicated instruction within the central processing unit of the master processing core.

Status:
Grant
Type:

Utility

Filling date:

29 Apr 2016

Issue date:

20 Apr 2021