Microchip Technology Incorporated
WAKE DETECTION AT CONTROLLER FOR PHYSICAL LAYER OF SINGLE PAIR ETHERNET NETWORK, AND RELATED SYSTEMS, METHODS AND DEVICES

Abstract:

Circuitry for detecting valid signals on a single pair Ethernet bus and related systems are described. Also described are circuits and related systems for wake detection at a physical layer of a network segment, and in some embodiments, wake detection circuitry may include, or use, the signal detection circuitry. In some cases, a low frequency clock generator may be used to clock wake detection circuitry, including during low power modes of operation. In some cases, the low frequency clock generator may be enabled or disabled, selectively, to limit power consumption.