Skyworks Solutions, Inc.
Method of providing protective cavity and integrated passive components in wafer level chip scale package using a carrier wafer

Abstract:

A wafer-level chip-scale package includes a polymeric body having a conductive via passing through the polymeric body and a piezoelectric substrate directly bonded to an upper end of the conductive via. The wafer-level chip-scale package further includes a cavity defined between a portion of the polymeric body and the piezoelectric substrate and a metal seal ring disposed in the body and having an upper end bonded to the piezoelectric substrate, the metal seal ring passing only partially through the body.