Xilinx, Inc.
LOW POWER INVERTER-BASED CTLE

Last updated:

Abstract:

An example continuous time linear equalizer (CTLE) includes a first inverter; a second inverter having an input to receive an input signal; a capacitor coupled between an input of the first inverter and the input of the second inverter; a resistor coupled between a common-mode voltage and the input of the first inverter; a third inverter having an output to provide an output signal; and a node comprising an output of the first inverter, an output of the second inverter, an input of the third inverter, and the output of the third inverter.

Status:
Application
Type:

Utility

Filling date:

10 Mar 2020

Issue date:

16 Sep 2021