Xilinx, Inc.
Chip package assembly with enhanced solder resist crack resistance
Last updated:
Abstract:
A chip package assembly having robust solder connections are described herein. In one example, a chip package assembly is provided that includes an integrated circuit (IC) die and a package substrate. Solder pads are arranged to connect to pillars of the IC die via solder connections. Solder resist in the corners of the package substrate and surrounding the solder connections may be inhibited from cracking isolating the portion of the solder resist surrounding the solder pads and/or by providing an offset between centerlines of the pillars and solder pads.
Status:
Grant
Type:
Utility
Filling date:
17 Jun 2020
Issue date:
26 Apr 2022