Xilinx, Inc.
Stacked silicon package assembly having thermal management
Last updated:
Abstract:
A chip package assembly and method for fabricating the same are provided which utilize a plurality of extra-die heat transfer posts for improved thermal management. In one example, a chip package assembly is provided that includes a first integrated circuit (IC) die mounted to a substrate, a cover disposed over the first IC die, and a plurality of extra-die conductive posts disposed between the cover and substrate. The extra-die conductive posts provide a heat transfer path between the cover and substrate that is laterally outward of the first IC die.
Status:
Grant
Type:
Utility
Filling date:
28 Sep 2018
Issue date:
7 Jun 2022