Xilinx, Inc.
Data processing engine tile architecture for an integrated circuit
Last updated:
Abstract:
An example data processing engine (DPE) for a DPE array in an integrated circuit (IC) includes: a core; a memory including a data memory and a program memory, the program memory coupled to the core, the data memory coupled to the core and including at least one connection to a respective at least one additional core external to the DPE; support circuitry including hardware synchronization circuitry and direct memory access (DMA) circuitry each coupled to the data memory; streaming interconnect coupled to the DMA circuitry and the core; and memory-mapped interconnect coupled to the core, the memory, and the support circuitry.
Status:
Grant
Type:
Utility
Filling date:
3 Apr 2018
Issue date:
28 Jun 2022