Xilinx, Inc.
Receiver for and method of implementing a receiver in an integrated circuit device

Abstract:

A receiver implemented in an integrated circuit device is described. The receiver circuit comprises a first receiver circuit configured to receive first data, wherein the first receiver circuit comprises a first memory element configured to receive the first data in response to a first clock signal; a latency mirror circuit configured to receive second data, wherein the latency mirror circuit comprises a second memory element configured to receive the second data in response to a second clock signal; and a latency control circuit configured to detect a latency in the second data, wherein the latency control circuit adjusts a phase of the first clock signal used to receive the first data in the first receiver circuit.