Xilinx, Inc.
Adaptable dynamic region for hardware acceleration
Last updated:
Abstract:
Creating an adaptable dynamic region for hardware acceleration can include receiving a first kernel for inclusion in a circuit design for an integrated circuit of an accelerator platform. The circuit design includes a dynamic design corresponding to a dynamic region of programmable circuitry in the integrated circuit that couples to a static region of the programmable circuitry. The first kernel can be included in the within the dynamic design. A global resource used by the first kernel can be determined. An interconnect architecture for the dynamic design can be constructed based on the global resource used by the first kernel.
Status:
Grant
Type:
Utility
Filling date:
19 Dec 2018
Issue date:
27 Oct 2020