Xilinx, Inc.
Modular and stackable integrated logic analyzer

Last updated:

Abstract:

An integrated circuit having an integrated logic analyzer can include a match circuit including at least one match cell, wherein each match cell is programmable at runtime to detect a signal state from a plurality of signal states for a probed signal. The integrated circuit can include a combine circuit configured to generate a first match signal indicating an occurrence of a first trigger condition based upon the detected signal state of each match cell, a capture and control circuit configured to determining addressing for storing trace data corresponding to the probed signal, and a trace storage memory configured to the store trace data at addresses determined by the capture and control circuit.

Status:
Grant
Type:

Utility

Filling date:

8 Nov 2017

Issue date:

21 Apr 2020