Xilinx, Inc.
Methods of interconnect for high density 2.5D and 3D integration

Last updated:

Abstract:

Methods and apparatus are described for enabling copper-to-copper (Cu--Cu) bonding at reduced temperatures (e.g., at most 200.degree. C.) by significantly reducing Cu oxide formation. These techniques provide for faster cycle time and entail no extraordinary measures (e.g., forming gas). Such techniques may also enable longer queue (Q) or staging times. One example semiconductor structure generally includes a semiconductor layer, an adhesion layer disposed above the semiconductor layer, an anodic metal layer disposed above the adhesion layer, and a cathodic metal layer disposed above the anodic metal layer. An oxidation potential of the anodic metal layer may be greater than an oxidation potential of the cathodic metal layer. Such a semiconductor structure may be utilized in fabricating IC packages implementing 2.5D or 3D integration.

Status:
Grant
Type:

Utility

Filling date:

29 Mar 2017

Issue date:

17 Mar 2020