Xilinx, Inc.
Chip package test system

Last updated:

Abstract:

An integrated chip package assembly test system and method for testing a chip package assembly are described herein. In one example, an integrated circuit chip package test system includes a socket and a workpress. The socket is configured to receive a chip package assembly for testing in the test system. The workpress is positioned over the socket and has a bottom surface that is dynamically conformable to a multi-planar top surface topography of the chip package assembly.

Status:
Grant
Type:

Utility

Filling date:

2 Nov 2017

Issue date:

21 Jan 2020