Xilinx, Inc.
Using implemented core sources for simulation

Last updated:

Abstract:

Using pin planning for core sources includes identifying, using a processor, a first pin configuration and a second pin configuration for a core source of a behavioral description of a circuit design. The second pin configuration is generated by a pin planning operation. The first pin configuration of the core source can be compared with the second pin configuration of the core source using a processor. Responsive to detecting a difference between the first pin configuration and the second pin configuration, the core source can be automatically update, using the processor, based upon the second pin configuration.

Status:
Grant
Type:

Utility

Filling date:

1 Sep 2016

Issue date:

8 Oct 2019