Xilinx, Inc.
Timing error measurement in current steering digital to analog converters
Last updated:
Abstract:
An example timing error measurement system includes a digital-to-analog converter (DAC) having a plurality of current steering circuits, the DAC responsive to a clock signal, a one-bit comparator coupled to a differential output of the DAC, a filter coupled to an output of the one-bit comparator, control logic coupled to an output of the filter, and a delay line coupled to an output of the control logic. An output of the delay line is coupled to an input of the one-bit comparator. The delay line is configured to delay the clock signal.
Status:
Grant
Type:
Utility
Filling date:
21 Aug 2018
Issue date:
17 Sep 2019