Texas Instruments Incorporated
Multi-processor bridge with cache allocate awareness
Last updated:
Abstract:
Techniques for loading data, comprising receiving a memory management command to perform a memory management operation to load data into the cache memory before execution of an instruction that requests the data, formatting the memory management command into one or more instruction for a cache controller associated with the cache memory, and outputting an instruction to the cache controller to load the data into the cache memory based on the memory management command.
Status:
Grant
Type:
Utility
Filling date:
15 Oct 2019
Issue date:
24 Aug 2021