Texas Instruments Incorporated
SILICON HALL SENSOR WITH LOW OFFSET AND DRIFT COMPENSATION COILS

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Abstract:

An integrated circuit includes a doped region having a first conductivity type formed in a semiconductor substrate having a second conductivity type. A dielectric layer is located between the doped region and a surface plane of the semiconductor substrate, and a polysilicon layer is located over the dielectric layer. First, second, third and fourth terminals are connected to the doped region, the first and third terminals defining a conductive path through the doped region and the second and fourth terminals defining a second conductive path through the doped region, the second path intersecting the first path.

Status:
Application
Type:

Utility

Filling date:

9 Sep 2020

Issue date:

10 Mar 2022