Texas Instruments Incorporated
COATED SEMICONDUCTOR DIES

Last updated:

Abstract:

In examples, a chip scale package (CSP) comprises a semiconductor die; a conductive terminal coupled to the semiconductor die; and a non-conductive coat covering a backside of the semiconductor die and a sidewall of the semiconductor die. The non-conductive coat has a thickness of less than 45 microns.

Status:
Application
Type:

Utility

Filling date:

26 Aug 2020

Issue date:

3 Mar 2022