Texas Instruments Incorporated
SCAN TESTABLE THROUGH SILICON VIAs

Last updated:

Abstract:

In one example, an integrated circuit comprises a die. The die has a first surface and a second surface, the second surface opposite to the first surface. The die also includes: a first contact on the first surface and a second contact on the second surface; a through silicon via having a first end and a second end, the first end coupled to the first contact and the second end coupled to the second contact; and a scan cell having a control input, a response input, and a stimulus output, the response input coupled to the first end and the stimulus output coupled to the second end.

Status:
Application
Type:

Utility

Filling date:

6 Apr 2022

Issue date:

21 Jul 2022