Texas Instruments Incorporated
TRANSITION FAULT TEST (TFT) CLOCK RECEIVER SYSTEM

Abstract:

One example includes a clock receiver system. The system includes a scan clock generator configured to receive a shift clock signal and a high-speed clock signal and to generate a scan clock signal for a transition fault test (TFT) based on the high-speed clock signal. The scan clock generator can provide the scan clock signal as having a pulse sequence comprising at least one preliminary pulse followed by periodic logic state transitions in a capture window during the TFT. The system also includes receiver logic configured to receive the scan clock signal and being programmed to identify each of the at least one preliminary pulse and the periodic logic state transitions in the capture window to pass the TFT.