Texas Instruments Incorporated
DMOS transistor having thick gate oxide and STI and method of fabricating

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Abstract:

An integrated circuit chip and a method of fabricating the IC chip to include a transistor having a thick gate oxide in combination with STI. The method provides a wafer for which a source region location, a drain contact region location, an extended drain region location and a gate region location have been defined and forms an STI structure overlying the extended drain region location. After growing a gate oxide layer over the gate region location and a portion of the extended drain region location, the method forms a gate structure on the gate oxide layer, the gate structure having a gap overlying the intersection of an edge of the STI structure with the gate oxide layer.

Status:
Grant
Type:

Utility

Filling date:

2 Nov 2018

Issue date:

29 Jun 2021