Texas Instruments Incorporated
Peripheral component interconnect (PCI) backplane connectivity system on chip (SoC)
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Abstract:
An integrated circuit. The integrated circuit comprises an interconnect communication bus and a plurality of peripheral component interconnect (PCI) multi-function endpoints (MFN-EPs) coupled to the interconnect communication bus, each PCI MFN-EP comprising a multiplexing device, a first address translation unit (ATU), and at least one PCI function circuit, each PCI function circuit comprising another ATU and a plurality of base address registers (BARs).
Status:
Grant
Type:
Utility
Filling date:
14 Dec 2018
Issue date:
8 Jun 2021