Texas Instruments Incorporated
Integrated capacitor with sidewall having reduced roughness

Last updated:

Abstract:

A method of forming an integrated capacitor on a semiconductor surface on a substrate includes etching a capacitor dielectric layer including at least one silicon compound material layer on a bottom plate which is above and electrically isolated from the semiconductor surface to provide at least one defined dielectric feature having sloped dielectric sidewall portion. A dielectric layer is deposited to at least partially fill pits in the sloped dielectric sidewall portion to smooth a surface of the sloped dielectric sidewall portion. The dielectric layer is etched, and a top plate is then formed on top of the dielectric feature.

Status:
Grant
Type:

Utility

Filling date:

10 Nov 2016

Issue date:

13 Apr 2021