Applied Materials, Inc.
DRAM CAPACITOR TO STORAGE NODE'S LANDING PAD AND BIT LINE AIRGAP

Abstract:

Memory devices and methods of forming memory devices are described. Specifically, dynamic random-access memory (DRAM) devices are provided with a capacitor landing pad able to connect a 6f.sup.2 layout to a 4f.sup.2 layout. In some embodiments, the capacitor landing pad has a plurality of air gaps.