Applied Materials, Inc.
Universal process kit

Abstract:

The implementations described herein generally relate to a process kit suitable for use in a semiconductor process chamber, which reduces edge effects and widens the processing window with a single edge ring as compared to conventional process kits. The process kit generally includes an edge ring disposed adjacent to and surrounding a perimeter of a semiconductor substrate in a plasma chamber. A dimension of a gap between the substrate and the edge ring is less than about 1000 .mu.m, and a height difference between the substrate and the edge ring is less than about (+/-) 300 .mu.m. The resistivity of the ring is less than about 50 Ohm-cm.