Advanced Micro Devices, Inc.
SIGNALLING FOR HETEROGENEOUS MEMORY SYSTEMS
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Abstract:
A memory controller interfaces with a non-volatile storage class memory (SCM) module over a heterogenous memory channel, and includes a command queue for receiving memory access commands. A memory interface queue is coupled to the command queue for holding outgoing commands. A non-volatile command queue is coupled to the command queue for storing non-volatile read commands that are placed in the memory interface queue. An arbiter selects entries from the command queue, and places them in the memory interface queue for transmission over a heterogenous memory channel. A control circuit is coupled to the heterogenous memory channel for receiving a ready response from the non-volatile SCM module indicating that responsive data is available for a non-volatile read command, and in response to receiving the ready response, causing a send command to be placed in the memory interface queue for commanding the non-volatile SCM module to send the responsive data.
Utility
30 Dec 2019
1 Jul 2021