Advanced Micro Devices, Inc.
DIE STACKING FOR MULTI-TIER 3D INTEGRATION

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Abstract:

Various die stacks and methods of creating the same are disclosed. In one aspect, a method of manufacturing is provided that includes mounting a first semiconductor die on a second semiconductor die of a first semiconductor wafer. The second semiconductor die is singulated from the first semiconductor wafer to yield a first die stack. The second semiconductor die of the first die stack is mounted on a third semiconductor die of a second semiconductor wafer. The third semiconductor die is singulated from the second semiconductor wafer to yield a second die stack. The second die stack is mounted on a fourth semiconductor die of a third semiconductor wafer.

Status:
Application
Type:

Utility

Filling date:

16 Jul 2020

Issue date:

5 Nov 2020