Advanced Micro Devices, Inc.
POWER REDUCTION FOR MACHINE LEARNING ACCELERATOR BACKGROUND

Abstract:

A technique for performing neural network operations is disclosed. The technique includes identifying a first matrix tile and a second matrix tile, obtaining first range information for the first matrix tile and second range information for the second matrix tile, selecting a matrix multiplication path based on the first range information and the second range information, and performing a matrix multiplication on the first matrix tile and the second matrix tile using the selected matrix multiplication path to generate a tile matrix multiplication product.