Advanced Micro Devices, Inc.
Multi-bank cache

Abstract:

Techniques are disclosed for processing cache operations. The techniques include determining a set of cache lines that include data for a vector memory access request; determining bank allocation priorities for the set of cache lines, wherein the bank allocation priorities are chosen to result in the set of cache lines being evenly distributed among the banks; determining actual banks for the set of cache lines; and accessing the cache lines in one or more access iterations, wherein at least one of the one or more access iterations includes accessing multiple cache lines in different banks at the same time.