Advanced Micro Devices, Inc.
Die stacking for multi-tier 3D integration

Last updated:

Abstract:

Various die stacks and methods of creating the same are disclosed. In one aspect, a method of manufacturing is provided that includes mounting a first semiconductor die on a second semiconductor die of a first semiconductor wafer. The second semiconductor die is singulated from the first semiconductor wafer to yield a first die stack. The second semiconductor die of the first die stack is mounted on a third semiconductor die of a second semiconductor wafer. The third semiconductor die is singulated from the second semiconductor wafer to yield a second die stack. The second die stack is mounted on a fourth semiconductor die of a third semiconductor wafer.

Status:
Grant
Type:

Utility

Filling date:

16 Jul 2020

Issue date:

23 Feb 2021