Arista Networks, Inc.
SELECTIVE MATRIX FOR HIGH-POTENTIAL TESTING

Abstract:

A method for testing a printed circuit board is provided. The method includes accessing a list of conductive lands of a printed circuit board to be tested and forming a list of pairs of adjacent conductive lands, based on adjacency assessment in the list of conductive lands. The method includes performing high-potential testing on the printed circuit board, on each of the pairs of adjacent conductive lands.