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CO-INTEGRATED HIGH VOLTAGE (HV) AND MEDIUM VOLTAGE (MV) FIELD EFFECT TRANSISTORS WITH DEFECT PREVENTION STRUCTURES

Abstract:

The present disclosure relates to semiconductor structures and, more particularly, to co-integrated high voltage and medium voltage devices with defect prevention structures and methods of manufacture. The structure includes: a semiconductor on insulator (SOI) region and a bulk region integrated in a single substrate; at least one active device in the bulk region; at least one active device in the SOI region; and a defect prevention structure bordering the SOI region.