Alibaba Group Holding Limited
MEMORY CONTROL METHOD AND SYSTEM

Abstract:

Memory control methods and systems are provided. A memory architecture includes one or more accelerators, a controller, and a transactional interface. A respective accelerator of the one or more accelerators includes a respective storage area configured to store data and a respective computation unit configured to perform computation. The respective storage area and the respective computation unit are configured to interact with each other. The controller is coupled with the one or more accelerators. The controller is configured to control the one or more accelerators, receive a command from a host, and perform an operation in response to receiving the command. The transactional interface is coupled between the controller and the host and includes a command and address signal channel, which is configured to transfer command and address signals from the host to the controller.