Cadence Design Systems, Inc.
Clock calibration for data serializer
Last updated:
Abstract:
Various embodiments provide for calibrating one or more clock signals for a serializer, which can be used with a circuit for data communications, such as serializer/deserializer (SerDes) communications. In particular, for a serializer operating based on a plurality of clock signals, some embodiments provide for calibration of one or more of the plurality of clock signals by adjusting a duty cycle of one or more clock signals, a delay of one or more clock signals, or both.
Status:
Grant
Type:
Utility
Filling date:
30 Jul 2020
Issue date:
18 Jan 2022