Cadence Design Systems, Inc.
System and method for objective probing and generation of timing constraints associated with an electronic circuit design

Abstract:

The present disclosure relates to a method for use with an electronic design. Embodiments may include receiving an electronic design having a plurality of objects associated therewith. Embodiments may further include allowing, at a graphical user interface, a user to define at least one user-refined filter selected from the group consisting of an instance pin filter, a library cell instance filter, a clock pin filter, and a net filter. Embodiments may also include generating one or more constraints based upon, at least in part, the user-refined filter.