Cadence Design Systems, Inc.
Systems and methods of concurrent placement of input-output pins and internal components in an integrated circuit design

Abstract:

Embodiments disclosed herein describe systems, methods, and products for concurrently placing and optimizing input-output (IO) pins and internal components of an integrated circuit (IC) design. In an illustrative process flow, the computer (executing an illustrative EDA tool) may import the IC design and unplace the IO pins of the imported IC design. The computer may set one or more constraints for the IO pins with more degrees of freedom than the conventional pre-fixed locations. The computer may then concurrently place the IO pins and the internal components such that the IO pins obey the one or more constraints. The computer may iteratively optimize the placement of the IO pins and the internal components while ensuring that the one or more constraints are not violated.