Cadence Design Systems, Inc.
System, method, and computer program product for automatically inferring case-split hints in equivalence checking of an electronic design

Abstract:

The present disclosure relates to a method for use in a formal verification of an electronic design. Embodiments may include receiving, using a processor, a reference model including a software specification and an implementation model at a register transfer level. Embodiments may also include generating one or more invariants based upon, at least in part, the reference model, wherein generating one or more invariants includes applying a semantic analysis. Embodiments may further include automatically generating at least one case splitting candidate based upon, at least in part, the one or more generated invariants.