Cadence Design Systems, Inc.
Systems and methods of aligning sets of wires with minimum spacing rules

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Abstract:

Embodiments disclosed herein describe systems, methods, and products for aligning wires in an integrated circuit (IC) design. An illustrative computer may identity multiple references in a first set of wires and multiple targets in a second set of wires in the IC design. The computer may determine reference target pairs from the multiple references and multiple targets. The computer may calculate a path difference for each of the reference target pairs and align the corresponding wires based upon the path difference while obeying minimum spacing rules. The computer may also allow a circuit designer to modify or override the computer selected references, targets, or reference target pairs. Embodiments disclosed herein therefore mitigate the alignment problems of shorting and incorrect spacing.

Status:
Grant
Type:

Utility

Filling date:

30 Dec 2019

Issue date:

30 Mar 2021