Cadence Design Systems, Inc.
Clock pin to clock tap assignment based on circuit device connectivity

Abstract:

Various embodiments provide for assigning a clock pin to a clock tap within a circuit design based on connectivity between circuit devices of the circuit design. For some embodiments, an initial clock tap assignment, between a clock tap of a circuit design and a clock pin of the circuit design, is accessed as input, and a modified clock tap assignment (between the clock tap and another clock pin of the circuit design) can be generated based on one or more of the following considerations: a clock tap assignment should try to assign clock pins of connected circuit devices to the same clock tap; a clock tap assignment should try to assign clock pins of connected circuit devices having the critical timing problems; a clock tap assignment should try to assign clock pins of connected circuit devices to clock taps with longer common path length.