Cadence Design Systems, Inc.
Time based feed forward equalization (TFFE) for high-speed DDR transmitter
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Abstract:
Circuits, methods and systems that are to be used for dynamically modulating a high frequency bit duration of data based on a status of one or more previous transmitted bits. One circuit comprises a first data path comprising a first input, a first buffer, and a first output connected to a first multiplexer data input. The circuit further comprises a second data path comprising a second input, a second buffer, a phase interpolator, and a second output coupled to a second multiplexer data input. The circuit further comprises a multiplexer having at least two data inputs, at least one control input, and a common output coupled to a transmitter signal line and wherein the at least one control input is operatively coupled to a generated control signal that is based on the status of one or more previous transmitted bits.
Utility
24 Dec 2019
24 Nov 2020