Cadence Design Systems, Inc.
Electronic circuit design editor with overlay of layout and schematic design features

Abstract:

A system and method for an interactive circuit layout design that provides spatially adaptive overlay indicative of parametric properties. A physical layout of an electrical circuit product is rendered on a display. At least one net of the physical layout is delineated into a plurality of net segments each having at least one physical property parametrically specified in a value therefor. For each net segment, a corresponding segment indicator is selectively rendered on the display, adaptively positioned and spatially mapped to the net segment corresponding thereto as a symbolic surrogate for the corresponding net segment within the physical layout. Selection of a net segment actuates determination of a behavior of the electrical circuit product during an operation consistent with an electrical response of the corresponding net segment. Editing of a net of the physical layout delineates a plurality of updated net segments for the edited net exclusive of other nets.