Cadence Design Systems, Inc.
System, method, and computer program product for providing feedback during formal verification

Last updated:

Abstract:

The present disclosure relates to a method for electronic design verification. Embodiments may include receiving, using a processor, at least one electronic design file and a set of inputs from a user, wherein the at least one electronic design file and set of inputs are associated with an electronic design. Embodiments may further include performing formal verification on at least a portion of the electronic design and determining, using a model checker, one or more conflicts associated with a variable during the formal verification. Embodiments may also include translating the one or more conflicts into one or more corresponding signal names and displaying, at a graphical user interface, the corresponding signal names.

Status:
Grant
Type:

Utility

Filling date:

6 Jun 2017

Issue date:

19 Nov 2019