Cadence Design Systems, Inc.
Method and apparatus for efficient and accurate signal electromigration analysis of digital-on-top designs with complex interface pin shapes

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Abstract:

An approach is described for efficient and accurate signal electromigration analysis of digital-on-top designs with complex interface pin shapes. According to some embodiments, the approach includes performance of parasitic analysis for the interface between nets and primitive/macro cell (blocks). Specifically, the approach includes performing parasitic analysis based on actual location information corresponding to overlap/connection between ports within blocks, external net connections to the ports, and internal net (block net) connections to the port. Thus, by determining the actual locations of the connections (as opposed to a presumed location) the parasitic effects associated with the ports and the connections thereof can be calculated.

Status:
Grant
Type:

Utility

Filling date:

29 Sep 2017

Issue date:

24 Sep 2019