Cadence Design Systems, Inc.
Method and system to mitigate large power load steps due to intermittent execution in a computation system

Abstract:

Disclosed herein are systems and methods to generate, by a compiling processor, one or more sets of one or more execution instructions responsive to compiling a netlist file. The method further includes storing, by the compiling processor, a set of execution instructions into an instruction memory of an execution processor. The method further includes generating, by a compiling processor, a set of one or more keephot instructions for the execution processor based upon the set of execution instructions stored into the instruction memory of the execution processor. The method further includes storing, by a compiling processor, the set of keephot instructions into the instruction memory of the execution processor.