Telefonaktiebolaget LM Ericsson (publ)
PHASE-LOCKED LOOP APPARATUS AND METHOD FOR CLOCK SYNCHRONIZATION

Abstract:

A phase-locked loop (PLL) apparatus and a method for clock synchronization are disclosed. According to an embodiment, the PLL apparatus includes an adjustable oscillator, one or more first difference determiners, one or more first parameter determiners and a loop integrator. The adjustable oscillator can generate an oscillating signal based on a control signal. Each first difference determiner can receive a first clock reference signal and determine a phase difference between the received first clock reference signal and the oscillating signal. Each first parameter determiner can receive a phase difference from the one or more first difference determiners and generate a first control parameter based on a variation of the phase difference. The loop integrator can integrate the one or more first control parameters to generate the control signal for the adjustable oscillator.