General Electric Company
Tapered gate electrode for semiconductor devices
Last updated:
Abstract:
The subject matter disclosed herein relates to metal-oxide-semiconductor (MOS) devices, such as silicon carbide (SiC) power devices (e.g., MOSFETs, IGBTs, etc.) In an embodiment, a semiconductor device includes a gate oxide layer disposed on top of a semiconductor layer. The semiconductor device also includes a gate electrode having a tapered sidewall. Further, the gate electrode includes a polysilicon layer disposed on top of the gate oxide layer and a metal silicide layer disposed on top of the polysilicon layer.
Status:
Grant
Type:
Utility
Filling date:
27 Nov 2013
Issue date:
26 Jan 2021