Honda Motor Co., Ltd.
ILLEGAL SIGNAL DETECTION APPARATUS

Abstract:

An illegal signal detection apparatus includes: CPU and memory. The CPU is configured to perform: reading normal signal input to communication network at first cycle and abnormal signal input to the communication network at second cycle shorter than the first cycle; counting number of the abnormal signal read in the reading; and determining whether count value corresponding to the number of the abnormal signal read in the reading is equal to or greater than predetermined threshold value when abnormal state in which the abnormal signal is read in predetermined unit time period continuously occurs for predetermined time period. The CPU is configured to perform: the counting including weighting the count value so that the count value increases as compared with the number of the abnormal signal read in the reading with increase in the number of the abnormal signal read in the reading.