International Business Machines Corporation
TOP VIAS WITH SELECTIVELY RETAINED ETCH STOPS

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Abstract:

Integrated chips and methods of forming the same include forming conductive lines on an underlying layer, between regions of dielectric material. The regions of dielectric material are selectively patterned, leaving at least one dielectric remnant region. An interlayer dielectric is formed over the underlying layer and the at least one dielectric remnant region, between the conductive lines.

Status:
Application
Type:

Utility

Filling date:

23 Jan 2020

Issue date:

29 Jul 2021